CppSim 5.4

CppSim automatically generates, compiles and runs C code corresponding to the schematic design that you create.
Main features:
- Graphical Interface:
Systems are specified and simulated within a schematic editor, Sue2, and results are viewed using a waveform viewer (CppSimView or GTKWave).
- Analog modules:
A simple text template for each module is filled in by the user which can make use of a rich set of C classes to represent common functions such as filtering, noise, etc.
- Digital modules:
CppSim utilizes Verilator to automatically create C code corresonding to your Verilog modules, and seamlessly integrates this code into your system simulation.